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Pulse generator (Read 10530 times)
ShIE
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Pulse generator
02/08/11 at 01:32:00
 
To use this component, use the following component definition:
X[<Name>] _pulsegen(<Frequency> <DutyCycle>) <nodeName>
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ThVortex
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Re: Pulse generator
Reply #1 - 02/09/11 at 00:56:14
 
Thank you for writing two good components. I wonder why you choose to use a top-level modal-less dialog box for this component instead of the normal VMLAB GUI that shows up in the Control Panel window.
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Re: Pulse generator
Reply #2 - 02/09/11 at 12:18:54
 
I think that so it will be little bit more interesting. You so do not think? Certainly this component was better to create as MDI child window, but I could not.
I hope you have understood my English.
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Re: Pulse generator
Reply #3 - 02/09/11 at 13:25:29
 
You can do it like this, of course.

However, the user component API provides some resources that allow you to plug your own window into the Control Panel, who is actually the MDI child.

See demo user_com_demo\user_defined.prj for a pulse counter cell that also allows to throw a break on a given value.
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Re: Pulse generator
Reply #4 - 02/09/11 at 18:05:44
 
I was thinking that putting the GUI in the Control Panel would be the most natural way to do it. You already do the same thing with the frequency counter.

By the way, if you need to create a MDI child window, take a look at my [url=http://code.google.com/p/thvortex-vmlab/source/browse/trunk/mculib/hexfile.cpp]Hexfile.cpp[/url]. In particular look at the init(), destroy(), show(), Hide(), and MDI_proc() functions.
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Re: Pulse generator
Reply #5 - 02/13/11 at 04:40:45
 
Thank you for giving me very good reference. I have studied your code and found a lot of the useful. Now, to work with instance of the PulseGen I use attribut GWLP_USERDATA of a window. Of course, this is better and my code was simplified.

But, my main problem is not solved. I could not explicitly find VMLAB handle main window. I will try to explain. When I open project I receive correct handle. But I make rebuild or build after unload component it is incorrect. But it is already not very important.

By the way, I could write some components, for example a2d8.
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Re: Pulse generator
Reply #6 - 02/13/11 at 07:30:39
 
[quote author=243F232E253C3F22393821570 link=1297128721/0#5 date=1297572045]But, my main problem is not solved. I could not explicitly find VMLAB handle main window. I will try to explain. When I open project I receive correct handle. But I make rebuild or build after unload component it is incorrect. But it is already not very important.[/quote]
How did you try to find the main VMLAB window? The trick I use with GetParent() only works because the normal USE_WINDOW() dialog is already a descendant window of the main VMLAB window. If you create a top-level dialog then it has no parent, so GetParent() will immediately return NULL.

[quote author=243F232E253C3F22393821570 link=1297128721/0#5 date=1297572045]By the way, I could write some components, for example a2d8.[/quote]
Sure, I would appreciate any help you are willing to offer.
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Re: Pulse generator
Reply #7 - 02/13/11 at 08:55:57
 
I used GetTopWindow, GetForegroundWindow and GetParent, GetWindow(... GW_OWNER). It is worked when first loading a project. I think there is no such simple possibility to make it (to find handle).

a2d8
I already thought about a2d8 a little. VMLAB have the reverce component d2a8:
X[inst_name]  D2A8 i7 i6 i5 i4 i3 i2 i1 i0 out

a2d8 could be such:
X[inst_name]  A2D8  in VSS o7 o6 o5 o4 o3 o2 o1 o0.
VSS should be necessarily, because VMLAB give us only two functions: GET_VOLTAGE() and POWER() { return VDD - VSS }.
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Re: Pulse generator
Reply #8 - 02/13/11 at 23:49:03
 
There's no need for a VSS pin. If I remember correctly, the value returned by GET_VOLTAGE() is automatically scaled to always be between 0 and POWER(). This is even the case if VSS is not set to 0.
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Re: Pulse generator
Reply #9 - 02/14/11 at 06:48:39
 
[quote]X[inst_name]  A2D8  in VSS o7 o6 o5 o4 o3 o2 o1 o0.
VSS should be necessarily,...[/quote]
I was mistaken, should be VDD.

In test.zip there is a VMLAB project where components bitctrl, bitdisp, D2A8 are used. Change polarity of a power supply. The component bitdisp works only at positive polarity sign. I think is necessary VDD accurately to distinguish polarity of a supply (positive, negative, bipolar). But if it is supposed to use only the positive logic then it is not necessary.
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Re: Pulse generator
Reply #10 - 02/14/11 at 20:19:15
 
Oops. You're right. I was wrong in my assumption about GET_VOLTAGE(). Looks like it returns the value relative to GND (0V). We'll have to update the usercomp.pdf file which today says this about GET_VOLTAGE():

"It retrieves the voltage at the given pin (parameter "pPin") referred to VSS."

In that case, you may want to include both a VSS pin and an AREF pin so the user can control the input range.

I think that in the next VMLAB version we should also add a new interface function that returns the VSS value. That would let me fix the bitdisp component for non-zero VSS values without having to add a new pin (and therefore breaking all existing project files that use it).

It would also be nice if a component could retrieve the logic 0 and logic 1 threshold settings from the Options->Simulation->Digital menu. Most components wouldn't care (since a DIGITIAL_IN pin behaves like a Schmitt-trigger), but for something like bitdisp, I want to explicitly measure the UNKNOWN voltage range.
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