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why I can't use ETIMSK |= 1<<TOIE3; in ISR(USART1_ (Read 4464 times)
DreamCat
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why I can't use ETIMSK |= 1<<TOIE3; in ISR(USART1_
06/11/10 at 14:49:59
 
I'm using MEGA128L make a little project. test ok, so I buy some new MEGA128L chip. but these new chip can't working properly.

I need use tow usart port. and a 16-bit timer...

so I start debuging.

[code]
ISR(USART1_RX_vect)
{
     cdma_received[cdma_received_cnt] = UDR1;
     cdma_received_cnt++;
     TCNT3L = 0X1F;
     TCNT3H = 0X1C;
     ETIMSK |= 1<<TOIE3;
       PORTE ^= 1<<S_LED ; // for loop test to debug
}
[/code]
and the loop test for usart1:
[code]
while(1){
     uart1_sendchar(0x55); // do the loop test
     _delay_s(1); // delay 1 second
}
[/code]

I want to know, Can't I use "ETIMSK |= 1<<TOIE3;" at here ? once I comment this line, test is ok, but my program need it.

I'm not using 103 mode...just different batches of chips.
I also test all function I need of MEGA128L, all is ok.

that's all...I need help.
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ThVortex
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Re: why I can't use ETIMSK |= 1<<TOIE3; in ISR(USART1_
Reply #1 - 06/11/10 at 17:40:24
 
All I can think of is to verify that all the fuses are set the same on both the old and new parts. If CKSEL is different, then your AVR timers may be running at different speeds and only one of them may be getting a timer overflow interrupt. Do you also have a valid ISR for TIMER3 overflow (or do you at least have a RETI instruction at the vector address)?
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DreamCat
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Re: why I can't use ETIMSK |= 1<<TOIE3; in ISR(USART1_
Reply #2 - 06/12/10 at 13:51:05
 
thanks you reply...

here is ISR for TIMER3 overflow:

[code]
ISR(TIMER3_OVF_vect)
{
       flag_cdma_received_complete = 1;
     ETIMSK &= ~(1<<TOIE3);
     PORTE |= 1<<S_LED ;
}
[/code]

there is only a flag to set for recieve CDMA module.

I will change fuse to try different CKSEL ..

I'm using 7.3728MHz crystal. how config it can get best result?

Thanks indeed.
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DreamCat
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Re: why I can't use ETIMSK |= 1<<TOIE3; in ISR(USART1_
Reply #3 - 08/01/10 at 17:18:43
 
Sorry for my later reply...


I got the final result, the chip I buy late than the sample has some change:

I must close the free running A/D convertor, though I don't usie no-blocked ISR.
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