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Message started by culibin_100 on 12/11/11 at 18:44:30

Title: attyny 2313
Post by culibin_100 on 12/11/11 at 18:44:30

Hello. Tell, where, possibly, to take library for a microcircuit attyny2313

Title: Re: attyny 2313
Post by moderator on 12/14/11 at 19:23:02


Sorry there is no direct model for this micro embedded in VMLAB.

No idea if someone has written as an user component for it. If, so, it is not in the Reporistory section.

The only solution is to try the closest AVR one, try your software there in VMLAB, and then adapt it to the real tiny2313

Title: Re: attyny 2313
Post by culibin_100 on 12/15/11 at 10:20:35

Hello I use similar 90s2313, but in vmlab the timer 0 in a mode fast wpm doesn't work. Why there is no support of it мк? It supports difficult processors! I thank that have answered

Title: Re: attyny 2313
Post by culibin_100 on 01/29/12 at 16:27:29

Look at a file, it is possible to use it for this device?
// I/O registers definitions for the ATtiny2313

#ifndef _TINY2313_INCLUDED_
#define _TINY2313_INCLUDED_

#pragma used+
sfrb DIDR=1;
sfrb UBRRH=2;
sfrb UCSRC=3;
sfrb ACSR=8;
sfrb UBRRL=9;
sfrb UCSRB=0xa;
sfrb UCSRA=0xb;
sfrb UDR=0xc;
sfrb USICR=0xd;
sfrb USISR=0xe;
sfrb USIDR=0xf;
sfrb PIND=0x10;
sfrb DDRD=0x11;
sfrb PORTD=0x12;
sfrb GPIOR0=0x13;
sfrb GPIOR1=0x14;
sfrb GPIOR2=0x15;
sfrb PINB=0x16;
sfrb DDRB=0x17;
sfrb PORTB=0x18;
sfrb PINA=0x19;
sfrb DDRA=0x1a;
sfrb PORTA=0x1b;
sfrb EECR=0x1c;
sfrb EEDR=0x1d;
sfrb EEAR=0x1e;
sfrb PCMSK=0x20;
sfrb WDTCR=0x21;
sfrb TCCR1C=0x22;
sfrb GTCCR=0x23;
sfrb ICR1L=0x24;
sfrb ICR1H=0x25;
sfrw ICR1=0x24;   // 16 bit access
sfrb CLKPR=0x26;
sfrb OCR1BL=0x28;
sfrb OCR1BH=0x29;
sfrw OCR1B=0x28;   // 16 bit access
sfrb OCR1AL=0x2a;
sfrb OCR1AH=0x2b;
sfrw OCR1A=0x2a;   // 16 bit access
sfrb TCNT1L=0x2c;
sfrb TCNT1H=0x2d;
sfrw TCNT1=0x2c;  // 16 bit access
sfrb TCCR1B=0x2e;
sfrb TCCR1A=0x2f;
sfrb TCCR0A=0x30;
sfrb OSCCAL=0x31;
sfrb TCNT0=0x32;
sfrb TCCR0B=0x33;
sfrb MCUSR=0x34;
sfrb MCUCR=0x35;
sfrb OCR0A=0x36;
sfrb SPMCSR=0x37;
sfrb TIFR=0x38;
sfrb TIMSK=0x39;
sfrb EIFR=0x3a;
sfrb GIMSK=0x3b;
sfrb OCR0B=0x3c;
sfrb SPL=0x3d;
sfrb SREG=0x3f;
#pragma used-

// Interrupt vectors definitions

#define EXT_INT0 2
#define EXT_INT1 3
#define TIM1_CAPT 4
#define TIM1_COMPA 5
#define TIM1_OVF 6
#define TIM0_OVF 7
#define USART_RXC 8
#define USART_DRE 9
#define USART_TXC 10
#define ANA_COMP 11
#define PCINT 12
#define TIM1_COMPB 13
#define TIM0_COMPA 14
#define TIM0_COMPB 15
#define USI_STRT 16
#define USI_OVF 17
#define EE_RDY 18
#define WDT 19

// for compatibility with the interrupt vector names from Atmel's datasheet

#define INT0 EXT_INT0
#define INT1 EXT_INT1
#define USI_OVERF

Title: Re: attyny 2313
Post by moderator on 01/29/12 at 18:33:18


Sorry, I cannot help you, since I have no experience with the Tiny2313

Title: Re: attyny 2313
Post by culibin_100 on 01/31/12 at 18:55:18

I have library for attiny13, have placed it in folder C:\VMLAB\include, but in the list of the supported device it isn't present when I create the new project.что I do incorrectly? :'(

Title: Re: attyny 2313
Post by Eddy-B on 03/16/12 at 14:12:24

Since development of VMLab has slowed down to a (near) standstill, i've taken it upon myself to start working on a ATTiny2313 mico definition & DLL file to be able to accurately emulate this controller.
However, it would seem the current version of VMLab is not 100% complete to make it possible to do this, as some functionality is still marked with "pending implementation" such as the _Get_micro_data function.

Any idea when i can expect a new updated release of VMLab?

Title: Re: attyny 2313
Post by moderator on 03/16/12 at 18:46:07

Yes, you are right...

What I can do is to be sure that you are aligned with the last release: I provided some private release (I remember it was 3.15E (?) ) to some selected forum members showing an active contribution.

What release are you using?

Title: attiny 2313 USI/PORTB conflicts
Post by Eddy-B on 03/20/12 at 11:06:27

The latest (3.15G) as of now.
Question: i been trying to figure out how to get a callback from VMLab as soon as a PORT register changes.

The 2313's USI module has a partial PB5 override, as it will pull down the output pin when the USI output is low, and release it when the USI is high (this is USI in TWI mode). However, the pin is ALSO pulled low if and when PB5 is set to 0 using the PORT command.

FYI: setting PB5 to output in the DDR register makes it open drain/collector, instead of enabling the output driver.

So to emulate this behaviour i need to know the status of PB5 in both the PORTB and DDRB registers. I've tried assuming control over these registers in the DUMMY peripheral and then send NOTIFY messages to the USI DLL, but VMLab tells me the "address $38 is already assigned to PORTB" and i'm pretty much at a loss here :(

Any thoughts?

Title: Re: attyny 2313
Post by culibin_100 on 08/28/14 at 05:55:10

hi, everybody. there is here someone live? there are changes of support of tiny2313? while I try to change itself the description file, the program an error doesn't give out and shows porta god.я I think that else people have problems with vmlab & tiny2313

Title: Re: attyny 2313
Post by culibin_100 on 08/28/14 at 17:22:21

I have a complete description of tiny2313 .  wants to work with the file? ?
I will send to mail...my ur7isu@mail.ru

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