10 most Recent Topics - VMLAB users forum

10 most Recent Topics - VMLAB users forum http://www.amctools.com/cgi-bin/yabb2/YaBB.pl - VMLAB users forum en-us VMLAB users forum Fri, 18 May 2012 18:20:26 +0000 http://blogs.law.harvard.edu/tech/rss 30 VMLAB - ATmega168b and PWM http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1335124970/1#1 VMLAB users forum/VMLAB http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1335124970/1#1 Yes, that's correct but only in the phase correct and phase/frequency correct waveform generation modes. Are you sure the right one is selected in the WGM bits? Bug Reports - VMLab crash, while creating new micro files (3.15) http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1332253354/2#2 VMLAB users forum/Bug Reports http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1332253354/2#2 Portion of INI-file Code:<pre class="code" style="margin: 0px; width: 90%; overflow: auto;">[Peripheral:USI] DLL_model = TinyUSI ; DLL-based model defined in "TinyUSI.dll" Register_map = "USICR=$2D, USISR=$2E, USIDR=$2F" Port_map = "MISO=PB6, MOSI=PB5, SCK=PB7" Interrupt_map = "USI_Start=USIS, USI_Overflow=USIOVF" </pre> Portion of CPP-source for TinyUSI.dll Code:<pre class="code" style="margin: 0px; width: 90%; overflow: auto;">REGISTERS_VIEW DISPLAY(USISR, GADGET1, USISIF, USIOIF, USIPF, USIIDC, USICNT3, USICNT2, USICNT1, USICNT0) DISPLAY(USIDR, GADGET2, *, *, *, *, *, *, *, *) // DISPLAY(USICR, GADGET4, USISIE, USIOIE, USIWM1, USIWM0, USIICS1, USIICS0, USICLK, USITC) END_VIEW </pre> If you forget to declare the USICR in the CPP, like in the above code snippit, VMLab will crash. Omitting any of the other registers will result in a nice warning message about the REGISTER_VIEW info missing. But not if it is the first register that you've declared in the INI file. (using Windows XP). VMLAB - attyny 2313 http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1323629076/8#8 VMLAB users forum/VMLAB http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1323629076/8#8 The latest (3.15G) as of now. Question: i been trying to figure out how to get a callback from VMLab as soon as a PORT register changes. The 2313's USI module has a partial PB5 override, as it will pull down the output pin when the USI output is low, and release it when the USI is high (this is USI in TWI mode). However, the pin is ALSO pulled low if and when PB5 is set to 0 using the PORT command. FYI: setting PB5 to output in the DDR register makes it open drain/collector, instead of enabling the output driver. So to emulate this behaviour i need to know the status of PB5 in both the PORTB and DDRB registers. I've tried assuming control over these registers in the DUMMY peripheral and then send NOTIFY messages to the USI DLL, but VMLab tells me the "address $38 is already assigned to PORTB" and i'm pretty much at a loss here <img src="http://www.amctools.com/yabbfiles/Templates/Forum/default/sad.gif" border="0" alt="Sad" /> Any thoughts? Contributors / User-defined Components Repository - KS0108B Graphic LCD http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1250250728/29#29 VMLAB users forum/Contributors / User-defined Components Repository http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1250250728/29#29 Thanks for the answer.я has understood all works as thanks Bug Reports - Tutorial files http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1290638166/3#3 VMLAB users forum/Bug Reports http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1290638166/3#3 HI_ALL___Test Contributors / User-defined Components Repository - DS18b20 http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1262726745/8#8 VMLAB users forum/Contributors / User-defined Components Repository http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1262726745/8#8 thanks gif. Bug Reports - Bug in atmega162 timer2 simulation http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1320336835/0#0 VMLAB users forum/Bug Reports http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1320336835/0#0 Hello! I'm use Atmega162, in my program TIMER2 running in asynchronous mode and there are Timer2 overflow interrupt. In register TIMSK bit2, TOIE2 enable this interrupt, but in simulator, this bit have name "OCIE2" (see attached screenshot) timer2 init. code: Code:<pre class="code" style="margin: 0px; width: 90%; overflow: auto;">void timer2_init(void){ TIMSK &=~((1<<TOIE2)|(1<<OCIE2)); ASSR |= (1<<AS2); while (ASSR & (1 << TCON2UB)){}; TCNT2 = 0x00; while (ASSR & (1 << TCR2UB)){}; TCCR2 = (1 << CS22) | (1 << CS20); // clk/128 TIFR = (1 << OCF2) | (1 << TOV2); TIMSK |= (1 << TOIE2); // <---- in this moment set bit2 in TIMSK reg } </pre> Embedded Systems and Microcontrollers - how can i use AVR access extenal SRAM or SDRAM? http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1259381976/5#5 VMLAB users forum/Embedded Systems and Microcontrollers http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1259381976/5#5 <a class="message" href="http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1259381976/0#2">DreamCat wrote</a> on 11/29/09 at 08:20:00: <div class="quote" style="width: 90%">thank you!! i found some article about access them, i will try it on my mega16 or mega128... </div> From where did you find the articles??? VMLAB - Welcome to our forum! http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1138638989/16#16 VMLAB users forum/VMLAB http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1138638989/16#16 I want to say thanks for this great simulator....and it's free too; unusual for such a kind of great tool. Hope I'll have nice simulations with it. VMLAB - Problem with EXTIN/EXTOUT http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1315970665/1#1 VMLAB users forum/VMLAB http://www.amctools.com/cgi-bin/yabb2/YaBB.pl?num=1315970665/1#1 The EXTIN EXTOUT instances are only capable to "transmit" logic values, not voltages. Please, insure that in the corresponding nodes all voltages are properly defined, not Xs, intermediate level voltages, etc.   This is maybe the cause of your trouble...